C++ computational geometry algorithms for PCB design rule checking - BC-992

Genre de projet: Innovation
Discipline(s) souhaitée(s): Génie - informatique / électrique, Génie, Informatique, Sciences mathématiques
Entreprise: Anonymous
Durée du projet: 4 à 6 mois
Date souhaitée de début: Dès que possible
Langue exigée: Anglais
Emplacement(s): Victoria, BC, Canada
Nombre de postes: 1
Niveau de scolarité désiré: Études de premier cycle/baccalauréatMaîtriseDoctoratRecherche postdoctoraleNouvelle diplômée/nouveau diplômé
Ouvert aux candidatures de personnes inscrites à un établissement à l’extérieur du Canada: No

Au sujet de l’entreprise: 

We offer products and services within the hardware product compliance industry, with a focus on electromagnetic compatibility (EMC). We provide professional training, specialized test equipment, and semi-anechoic chambers used for regulatory compliance testing.

In parallel, we are developing Engentica, a desktop software platform aimed at identifying circuit-board-level EMC/EMI risks early in the design cycle. The software performs deterministic analysis of schematics and PCB layouts, augmented by AI-assisted interpretation of standards and datasheets.

Development has been underway for approximately two years, and a small senior engineering team has established the core system architecture, geometry engine, and data ingestion pipelines. We are now entering a phase focused on expanding the library of deterministic design-rule-checking (DRC) algorithms and preparing the product for initial commercial release.

Veuillez décrire le projet.: 

The goal of this project is to expand a C++-based computational geometry engine used for deterministic design-rule checking (DRC) of printed circuit boards (PCBs), with a focus on identifying layout-level issues that contribute to electromagnetic compatibility (EMC/EMI) failures. A key technical challenge is translating EMC engineering constraints into deterministic, geometry-based algorithms that operate directly on PCB layout data, reducing reliance on post-hoc testing and heuristic review.

The software ingests schematic and PCB layout data (including geometric representations of traces, planes, vias, components, and stack-ups) and applies algorithmic checks to detect rule violations and risk patterns. These checks operate on real production designs and are intended to surface issues early, before physical prototyping or compliance testing.

A core system architecture and geometry framework have already been implemented by the senior engineering team, and an initial DRC algorithm has been developed as a reference implementation. The selected candidate will work within this existing framework to design and implement additional DRC algorithms.

Typical tasks will include:

• Developing computational geometry algorithms operating on 2D and layered PCB data
• Implementing spatial queries (clearances, intersections, proximities, region relationships)
• Translating engineering rules into deterministic, testable C++ logic
• Validating algorithms against real PCB design datasets

The work is primarily applied software engineering and algorithm development. Emphasis is placed on correctness, performance, and maintainability rather than exploratory research. The outcome will be production-ready code integrated into a commercial desktop application.

Expertise ou compétences exigées: 

• Strong proficiency in modern C++
• Algorithm development, with emphasis on geometry or spatial problems
• Computational geometry concepts (e.g., intersections, regions, distance queries)
• Experience working with non-trivial codebases
Assets:
• Experience with CAD, EDA, GIS, or graphics-related geometry
• Familiarity with spatial indexing or performance-oriented data structures
• Use of AI-assisted development tools (e.g., Cursor, Claude Code) for productivity
• Experience developing native desktop engineering tools (e.g., Qt)